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BF992 Silicon N-channel dual gate MOS-FET Rev. 04 -- 21 November 2007 Product data sheet IMPORTANT NOTICE Dear customer, As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors, which will be used in future data sheets together with new contact details. In data sheets where the previous Philips references remain, please use the new links as shown below. http://www.philips.semiconductors.com use http://www.nxp.com http://www.semiconductors.philips.com use http://www.nxp.com (Internet) sales.addresses@www.semiconductors.philips.com use salesaddresses@nxp.com (email) The copyright notice at the bottom of each page (or elsewhere in the document, depending on the version) - (c) Koninklijke Philips Electronics N.V. (year). All rights reserved is replaced with: - (c) NXP B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or phone (details via salesaddresses@nxp.com). Thank you for your cooperation and understanding, NXP Semiconductors NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET APPLICATIONS * VHF applications such as VHF television tuners and FM tuners with 12 V supply voltage. The device is also suitable for use in professional communications equipment. DESCRIPTION Depletion type field-effect transistor in a plastic micro-miniature SOT143B package with source and substrate interconnected. The transistor is protected against excessive input voltage surges by integrated back-to-back diodes between gates and source. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 Top view Marking code: %MB. BF992 PINNING PIN 1 2 3 4 SYMBOL s, b d g2 g1 source drain gate 2 gate 1 DESCRIPTION handbook, halfpage 4 3 g2 g1 d 2 s,b MAM039 Fig.1 Simplified outline (SOT143B) and symbol. QUICK REFERENCE DATA SYMBOL VDS ID Ptot Yfs Cig1-s Crs F Tj PARAMETER drain-source voltage (DC) drain current (DC) total power dissipation forward transfer admittance input capacitance at gate 1 reverse transfer capacitance noise figure operating junction temperature Tamb = 60 C f = 1 kHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V f = 1 MHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V f = 1 MHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V GS = 2 mS; ID = 15 mA; VDS = 10 V; VG2-S = 4 V; f = 200 MHz CONDITIONS - - - 25 4 30 1.2 - TYP. MAX. 20 40 200 - - - - 150 V mA mW mS pF fF dB C UNIT Rev. 04 - 21 November 2007 2 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS ID IG1 IG2 Ptot Tstg Tj Note 1. Device mounted on a ceramic substrate, 8 mm x 10 mm x 0.7 mm. PARAMETER drain-source voltage drain current gate 1 current gate 2 current total power dissipation storage temperature operating junction temperature Tamb 60 C; see Fig.2; note 1 CONDITIONS - - - - - -65 - MIN. MAX. 20 40 10 10 200 +150 150 BF992 UNIT V mA mA mA mW C C MBL033 handbook, halfpage 200 Ptot max (mW) 100 0 0 100 Tamb (o C) 200 Fig.2 Power derating curves. Rev. 04 - 21 November 2007 3 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET THERMAL CHARACTERISTICS SYMBOL Rth j-a Note 1. Device mounted on a ceramic substrate, 8 mm x 10 mm x 0.7 mm. STATIC CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS VG2-S = VDS = 0; IG1-SS = 10 mA VG1-S = VDS = 0; IG2-SS = 10 mA VG2-S = 4 V; VDS = 10 V; ID = 20 A VG1-S = 0; VDS = 10 V; ID = 20 A VG2-S = VDS = 0; VG1-S = 7 V VG1-S = VDS = 0; VG2-S = 7 V 8 8 0.2 0.2 - - MIN. PARAMETER thermal resistance from junction to ambient in free air CONDITIONS note 1 VALUE 460 BF992 UNIT K/W MAX. 20 20 1.3 1.1 25 25 UNIT V V V V nA nA V(BR)G1-SS gate 1-source breakdown voltage V(BR)G2-SS gate 2-source breakdown voltage -V(P)G1-S -V(P)G2-S IG1-SS IG2-SS gate 1-source cut-off voltage gate 2-source cut-off voltage gate 1 cut-off current gate 2 cut-off current DYNAMIC CHARACTERISTICS Common source; Tamb = 25 C; VDS = 10 V; VG2-S = 4 V; ID = 15 mA; unless otherwise specified. SYMBOL yfs Cig1-s Cig2-s Cos Crs F PARAMETER forward transfer admittance input capacitance at gate 1 input capacitance at gate 2 output capacitance reverse transfer capacitance noise figure f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 200 MHz; GS = 2 mS CONDITIONS - - - - - MIN. 20 4 1.7 2 30 1.2 TYP. 25 MAX. - - - - 40 - UNIT mS pF pF pF fF dB Rev. 04 - 21 November 2007 4 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 handbook, halfpage I 24 MGE797 D (mA) handbook, halfpage 30 MGE799 4V3V VG2-S = 5 V 2V 20 VG1-S = 0.2 V 0.1 V 0V ID (mA) 20 16 12 1V -0.1 V -0.2 V -0.3 V 10 0V 8 4 -0.4 V -0.5 V -0.6 V 0 -1 0 0 2 4 6 8 10 VDS (V) 12 0 VG1-S (V) 1 VG2-S = 4 V; Tj = 25 C. VDS = 10 V; Tj = 25 C. Fig.3 Output characteristics; typical values. Fig.4 Transfer characteristics; typical values. handbook, halfpage 30 MGE798 handbook, halfpage 30 MGE800 |yfs| (mS) 20 5V 4V 3V 2V Yfs (mS) 20 VG2-S = 5V 4V 3V 10 1V VG2-S = 0 V 0 0 10 ID (mA) 20 10 2V 1V 0 -1 0V 0 VG1-S (V) 1 VDS = 10 V; Tj = 25 C. VDS = 10 V; Tj = 25 C. Fig.5 Forward transfer admittance as a function of drain current; typical values. Fig.6 Forward transfer admittance as a function of gate 1-source voltage; typical values. Rev. 04 - 21 November 2007 5 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 102 handbook, halfpage yis (mS) 10 bis MGE794 MGE793 handbook, halfpage 10 yos (mS) bos 1 1 gis 10-1 10-1 gos 10-2 10 102 f (MHz) 103 10-2 10 102 f (MHz) 103 VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 C. VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 C. Fig.7 Input admittance as a function of frequency; typical values. Fig.8 Output admittance as a function of frequency; typical values. handbook, halfpage 25 MGE795 Yfs (mS) 20 gfs handbook, halfpage 120 MGE796 yrs (S) 80 15 -brs 10 -bfs 40 5 grs 0 10 0 10 102 f (MHz) 103 102 103 f (MHz) VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 C. VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 C. Fig.9 Forward transfer admittance as a function of frequency; typical values. Fig.10 Reverse transfer admittance as a function of frequency; typical values. Rev. 04 - 21 November 2007 6 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET PACKAGE OUTLINE Plastic surface mounted package; 4 leads BF992 SOT143B D B E A X y vMA HE e bp wM B 4 3 Q A A1 c 1 b1 e1 2 Lp detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max 0.1 bp 0.48 0.38 b1 0.88 0.78 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 1.7 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1 y 0.1 OUTLINE VERSION SOT143B REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-02-28 Rev. 04 - 21 November 2007 7 of 9 NXP Semiconductors BF992 Silicon N-channel dual gate MOS-FET Legal information Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com Rev. 04 - 21 November 2007 8 of 9 NXP Semiconductors BF992 Silicon N-channel dual gate MOS-FET Revision history Revision history Document ID BF992_N_4 Modifications: BF992_3 (9397 750 06013) BF992_2 BF992_SF_1 Release date 20071121 Data sheet status Product data sheet Product specification Product specification Change notice Supersedes BF992_3 BF992_2 BF992_SF_1 - * Fig. 1 on page 2; Figure note changed 19990811 19960730 - Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 November 2007 Document identifier: BF992_N_4 |
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